Charge coupling refers to the process of transferring an electric charge (charge packet) between adjacent storage areas (potential wells) in a semiconductor material beneath adjacent electrodes (gates) by the sequenced application of external voltages to the gates.
Devices utilizing the charge coupling concept enable a charge packet created at an input portion of the device to be moved along a trough (channel) of adjacent potential wells to the output end of the device for conversion to a voltage that can be used by other circuits. In simple charge-coupled devices (CCDs) a row of spaced mutually parallel electrodes are placed in a close or overlapping, but electrically isolated, relationship on a thin insulating layer on the surface of a semiconductor crystal. Typically, the electrodes are metal or polysilicon, the semiconductor is silicon, and the insulating layer and the insulation between electrodes is silicon dioxide. If the semiconductor crystal is p-type, as is the usual case, the charge packet will consist of minority carriers (electrons).
The charge packet may be produced, for example, by injection by means of an input diode or by the photoelectric effect to form charge packets proportional to the light intensity to produce solid state imagers. Other applications for CCDs besides imagers include signal processors, digital memories and logic arrays.
Various improvements have been made to the above-described simple CCD in order to improve such CCD characteristics as speed, frequency response and, in the case of optical devices, resolution. One such improvement, wherein highly doped zones are provided beneath the second phase gates in a two-phase CCD structure to increase the quantity of charge which may be transferred between potential wells, is described by Stein in U.S. Pat. No. 4,290,187 which is herein incorporated by reference.
Generally, the device characteristics and charge coupling efficiency increase as gate width and the spacing between gates decrease. The use of metallic gates, as opposed to polysilicon gates, is also desirable for improved characteristics. Presently, high resolution CCDs having narrow, closely spaced gates are principally produced by means of the slow and costly electron-beam lithographic processes. Other techniques, such as photolithography, are more rapid but do not produce CCDs having as narrow and closely spaced gates as CCDs produced by electron-beam processes. Further adding to the time for manufacture and cost per device are the alignment steps required by most presently used lithographic processes.